Certain portable devices, including wireless handsets, notebook computers and personal digital assistants (PDAs), often employ circuitry which runs on two or more different voltage levels. For instance, circuitry utilized with such portable devices may be configured so that a portion of the circuitry, such as, for example, input/output (IO) buffers, runs at a higher voltage level (e.g., about 3.3 volts), as may be supplied by an IO voltage source, while another portion of the circuitry, such as, for example, core logic, runs at a substantially lower voltage level (e.g., about 1.0 volt), as may be supplied by a core voltage source. This difference in voltage levels often necessitates the use of a voltage level translator circuit for interfacing between the multiple voltage levels.
There are many applications in which a circuit (e.g., an IO buffer) may be required to operate over a wide range of IO voltage source levels. The level of the IO voltage source may be determined by the particular application. From a performance standpoint (e.g., speed, power consumption, reliability, etc.), it is generally preferable to manufacture multiple circuits, each circuit being individually optimized for a specific expected IO voltage source level of operation. However, this approach significantly increases the cost of both design and fabrication of the circuits, and is thus undesirable. It is well known that when the IO voltage source is brought down to a level comparable to the core voltage source level, such as, for instance, to conserve power, a standard voltage level translator circuit is often inoperable or operates with poor performance (e.g., slower speed, increased skew, etc.). Thus, standard voltage level translator circuits that are designed to handle a wide range of IO voltage source levels typically do so by compromising on circuit performance.
Accordingly, there exists a need for an improved voltage level translator circuit for interfacing between multiple voltage levels that does not suffer from one or more of the problems exhibited by conventional voltage level translator circuits.